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Functional Verification of Programmable Embedded Architectures

A Top-Down Approach
Sofort lieferbar | Lieferzeit: Sofort lieferbar I
ISBN-13:
9780387263991
Veröffentl:
2005
Seiten:
180
Autor:
Prabhat Mishra
eBook Typ:
PDF
eBook Format:
EPUB
Kopierschutz:
1 - PDF Watermark
Sprache:
Englisch
Beschreibung:

Functional Verification of Programmable Embedded Architectures: A Top-Down Approach is designed for students, researchers, CAD tool developers, designers, and managers interested in the development of tools, techniques and methodologies for system-level design, microprocessor validation, design space exploration and functional verification of embedded systems.
"Validation of programmable architectures, consisting of processor cores, coprocessors, and memory subsystems, is one of the major bottlenecks in current System-on-Chip design methodology. A critical challenge in validation of such systems is the lack of a golden reference model. As a result, many existing validation techniques employ a bottom-up approach to design verification, where the functionality of an existing architecture is, in essence, reverse-engineered from its implementation. Traditional validation techniques employ different reference models depending on the abstraction level and verification task, resulting in potential inconsistencies between multiple reference models.
to Functional Verification.- Architecture Specification.- Architecture Specification.- Validation of Specification.- Top-Down Validation.- Executable Model Generation.- Design Validation.- Functional Test Generation.- Future Directions.- Conclusions.

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