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Compilation Techniques for Reconfigurable Architectures

 eBook
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ISBN-13:
9780387096711
Einband:
eBook
Seiten:
223
Autor:
João M. P. Cardoso
Serie:
Springer
eBook Typ:
PDF
eBook Format:
EPUB
Kopierschutz:
1 - PDF Watermark
Sprache:
Englisch
Beschreibung:

The extreme ?exibility of recon?gurable architectures and their performance pot- tial have made them a vehicle of choice in a wide range of computing domains, from rapid circuit prototyping to high-performance computing. The increasing availab- ity of transistors on a die has allowed the emergence of recon?gurable architectures with a large number of computing resources and interconnection topologies. To - ploit the potential of these recon?gurable architectures, programmers are forced to map their applications, typically written in high-level imperative programming l- guages, such as C or MATLAB, to hardware-oriented languages such as VHDL or Verilog. In this process, they must assume the role of hardware designers and software programmers and navigate a maze of program transformations, mapping, and synthesis steps to produce ef?cient recon?gurable computing implementations. The richness and sophistication of any of these application mapping steps make the mapping of computations to these architectures an increasingly daunting process. It is thus widely believed that automatic compilation from high-level programming languages is the key to the success of recon?gurable computing. This book describes a wide range of code transformations and mapping te- niques for programs described in high-level programming languages, most - tably imperative languages, to recon?gurable architectures.
"This book describes a wide range of code transformations and mapping techniques for compiling programs written in high-level programming languages to reconfigurable architectures. While many of these transformations and mapping techniques have been developed in the context of compilation for traditional architectures and high-level synthesis, their application to reconfigurable architectures poses a whole new set of challenges - particularly when targeting fine-grained reconfigurable architectures such as contemporary Field-Programmable Gate-Arrays (FPGAs).
Organized in eight chapters, "Compilation Techniques for Reconfigurable Architectures" provides a helpful structure for practitioners and graduate students in the area of computer science and electrical and computer engineering to effectively map computations to reconfigurable architectures."
Overview of Reconfigurable Architectures.- Compilation and Synthesis Flows.- Code Transformations.- Mapping and Execution Optimizations.- Compilers for Reconfigurable Architectures.- Perspectives on Programming Reconfigurable Computing Platforms.- Final Remarks.

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