Field-Programmable Gate Arrays (FPGAs) have become the dominant digital implementation medium as measured by design starts. They are preferred because designers can avoid the pitfalls of nanoelectronic design and because the designer can change the design up until the last minute. However, it has always been understood that FPGAs use more area, are slower, and consume far more power than the alternative: Application-Specific ICs built from standard cells. But how much? Quantifying and Exploring the Gap Between FPGAs and ASICs is the first book to explore exactly what that difference is, to enable system designers to make better in-formed choices between these two media and to give insight to FPGA makers on the deficiencies to attack and thereby improve FPGAs. The gap is a very nuanced thing, though: it strongly depends on the nature of the circuit being implemented, in sometimes counterintuitive ways. The book presents a careful exploration of these issues in its first half. The second half of the book looks at ways that creators and users of FPGAs can close the gap between FPGAs and ASICs. It presents the most sweeping exploration of FPGA architecture and circuit design ever performed. The authors show that, with careful use of transistor-level design, combined with good choices of the soft-logic architecture, that a wide spectrum of FPGA devices can be used to narrow specific selected gaps in area, speed and power.

The book focuses on the cost/area, performance and power consumption differences between Field-Programmable Gate Arrays (FPGAs) and Application Specific Integrated Circuits (ASICs). These differences are referred to as the gap between FPGAs and ASICs and knowledge of this gap is fundamental for people who design FPGAs, who use FPGAs, or who are considering their use. This book reviews and examines the gap in two ways.The first portion of the book focuses on measurements of the silicon area, performance, and power consumption gap. This is done by comparing designs implemented on a commercial FPGA and using an ASIC methodology. Through this comparison, various trends are noted to elucidate some of the design choices that can narrow the gap.The latter half of the book focuses on the trade-offs that can be made in the creation of a FPGA to narrow the gap selectively. This is useful because silicon area, performance and power consumption are not equally important to all users of FPGAs. The book describes the approach used to investigate these trade-offs and it includes a detailed description of the transistor sizing tool developed to assist in this investigation. The scope of the trade-offs is then examined and the effect of these trade-offs on the FPGA to ASIC gap is considered. The idea of making cost and performance trade-offs has been considered in past works but this book explores the use of transistor-sizing to enable these trade-offs.

Background.- Measuring the Gap.- Automated Transistor Sizing for FPGAs.- Navigating the Gap Using Architecture and Process Technology Scaling.- Navigating the Gap using Transistor Sizing.- Conclusions and FutureWork.